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STG5123
Low voltage 1 single SPDT switch with break-before-make feature
Features
High speed: - tPD = 130 ps (typ.) at VCC = 3.0 V - tPD = 140 ps (typ.) at VCC = 2.3 V Ultra low power dissipation: - ICC = 0.2 A (max.) at TA = 85 C Low ON resistance: - RON = 1.0 (Typ.) at VCC = 4.5 V - RON = 1.2 (Typ.) at VCC = 3.0 V - RON = 2.0 (Typ.) at VCC = 1.8 V Wide operating voltage range: - VCC (opr) = 1.65 to 4.5 V single supply 5 V tolerant and 1.8 V compatible threshold on digital control input at VCC = 1.65 to 4.5 V Latch-up performance exceeds 200 mA per JESD 78, Class II ESD performance tested per JESD22 - 2000 V human-body model (A114-B, Class II) - 200 V machine model (A115-A) - 1000 V charged-device model (C101)
DFN6L

Description
The STG5123 is a high-speed CMOS low voltage single analog SPDT (single-pole dual-throw) switch or 2:1 multiplexer/demultiplexer switch fabricated using silicon gate C2MOS technology. Designed to operate from 1.65 to 4.5 V, this device is ideal for portable applications. The device offers very low ON resistance (1 ) at VCC = 4.5 V. The switch S1 is ON (connected to common ports Dn) when the SEL input is held high and OFF (state of high impedance state exists between the two ports) when SEL is held low. The switch S2 is ON (connected to common port D) when the SEL input is held low and OFF (state of high impedance state exists between the two ports) when SEL is held high. Additional key features are fast switching speed, break-before-make delay time and ultra low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD and transient excess voltage immunity.

Table 1.
Device summary
Order code STG5123DTR Package DFN6L (1.2 x 1 mm) Packaging Tape and reel
October 2007
Rev 1
1/18
www.st.com 18
Contents
STG5123
Contents
1 2 3 Pin connections and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1 3.2 3.3 DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 AC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Analog switch characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 5 6
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2/18
STG5123
Pin connections and functions
1
Pin connections and functions
Figure 1. Pin connections (top through view)
D
1
6
S2
V
CC
2
5
GND
SEL
3
4
S1
DFN6L
Table 2.
Pin descriptions
Symbol S1 S2 D SEL VCC GND Name and function Independent channel Independent channel Common channels Control Positive supply voltage Ground (0V)
Pin number 4 6 1 3 2 5
Figure 2.
Input equivalent circuit
S2
S1
Table 2.
Truth table
Sel H L Switch S1 ON OFF (1) Switch S2 OFF (1) ON
1. High impedance
3/18
Electrical ratings
STG5123
2
Electrical ratings
Stressing the device above the rating listed in the "Absolute maximum ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 3.
Symbol VCC VI VIC VO IIKC IIK IOK IO IOP ICC or IGND PD TSTG TL
1.
Absolute maximum ratings
Parameter Supply voltage DC input voltage DC control input voltage DC output voltage DC input diode current on control pin (VSEL < 0 V) DC input diode current (VIN < 0 V) DC output diode current DC output current DC output current peak (pulse at 1 ms, 10% duty cycle) DC VCC or ground current Power dissipation at TA = 70C (1) Storage temperature Lead temperature (10 sec) Value -0.5 to 5.5 -0.5 to VCC +0.5 -0.5 to 5.5 -0.5 to VCC +0.5 -50 50 20 200 400 100 1120 -65 to 150 300 Unit V V V V mA mA mA mA mA mA mW C C
Derate above 70C by 18.5mW/C
Table 4.
Symbol VCC VI VIC VO Top dt/dv
Recommended operating conditions
Parameter Supply voltage Input voltage Control input voltage Output voltage Operating temperature Input rise and fall time control input VCC = 1.65 to 2.7 V VCC = 3.0 to 4.5 V Value 1.65 to 4.5 0 to VCC 0 to 4.5 0 to VCC -40 to 85 0 to 20 ns/V 0 to 10 Unit V V V V C
4/18
STG5123
Electrical characteristics
3
3.1
Table 5.
Electrical characteristics
DC electrical characteristics
DC specifications
Value VCC (V)
Symbol
Parameter
Test condition Min
TA = 25 C Typ Max
-40 to 85 C Min 0.65 VCC 1.2 1.3 1.4 1.6 0.40 0.60 0.60 0.60 0.80 0.40 0.60 0.60 0.60 0.80 3.5 1.8 1.7 1.4 Max
Unit
1.65 - 1.95 2.3 - 2.5 VIH High level input voltage 2.7 - 3.0 3.3 - 3.6 4.5 1.65 - 1.95 2.3 - 2.5 VIL Low level input voltage 2.7 - 3.0 3.3 - 3.6 4.5 1.8 RON Switch ON resistance 2.7 3.0 4.5 1.8 RON ON resistance match between channels (1) 2.7 3.0 4.5 1.8 RFLAT ON resistance flatness (2) 2.7 3.0 4.5 OFF state leakage current (SN), (D) Input leakage current Quiescent supply current VS = 0 V to VCC IS = 100 mA VS at RON max IS = 100 mA VS = 0 V to VCC IS = 100 mA
0.65 VCC 1.2 1.3 1.4 1.6
V
V
2.0 1.3 1.2 1.0 0.06 0.05 0.05 0.05 1.0 0.45 0.43 0.39
3.0 1.6 1.5 1.2
1.5 0.60 0.50 0.50
1.5 0.70 0.60 0.60
IOFF
4.3
VS = 0.3 or 4 V
20
100
nA
IIN ICC
0 - 5.0 1.65 - 5.0
VSEL = 0 to 4.5 V VSEL = VCC or GND
0.1 0.05
1 0.2
A A
5/18
Electrical characteristics Table 5. DC specifications (continued)
Value Symbol Parameter VCC (V) Test conditions Min Quiescent supply current low voltage driving 4.3 4.3 4.3 VSEL = 1.65 V VSEL = 1.80 V VSEL = 2.60 V TA = 25 C Typ 17 15 5 Max 35 30 10 -40 to 85 C Min
STG5123
Unit
Max 70 60 20 A
ICCLV
1. RON = RON(Max) - RON(Min) 2. Flatness is defined as the difference between the maximum and minimum value of ON resistance as measured over the specified analog signal ranges.
3.2
Table 6.
AC electrical characteristics
AC electrical characteristics (CL = 35 pF, RL = 50 tr = tf 5 ns) ,
Value VCC (V) Test conditions Min 1.65 - 1.95 2.3 - 2.7
Symbol
Parameter
TA = 25 C Typ 0.15 0.14 Max
- 40 to 85 C Min Max
Unit
tPLH, tPHL Propagation delay
ns 3.0 - 3.3 3.6 - 5.0 1.65 - 1.95 2.3 - 2.7 VS = 0.8 V 0.13 0.13 36 31 VS = 1.5 V 24 21 VS = 0.8 29 17 VS = 1.5 V 12 11 15 CL = 35 pF RL = 50 VS = 1.5 V 10 ns 8 6 16 CL = 100pF VGEN = 0 V RGEN = 0 22 pC 26 33 27 23 21 37 ns 3.0 - 3.3 3.6 - 5.0 1.65 - 1.95 33 31 40 31 28 45 ns 3.0 - 3.3 3.6 - 5.0 1.65 - 1.95 2.3 - 2.7 40 32
tON
Turn-ON time
tOFF
Turn-OFF time
tD
Break-beforemake time delay
2.3 - 2.7 3.0 - 3.3 3.6 - 5.0 1.65 2.3
Q
Charge injection 3 5.0
6/18
STG5123
Electrical characteristics
3.3
Analog switch characteristics
Table 7. Analog switch characteristics (CL = 5 pF, RL = 50 TA = 25 C) ,
Value Symbol Parameter VCC (V) Test conditions Min OIRR Xtalk Off isolation (1) 1.65 - 5.0 Crosstalk 1.6 - 5.0 VS = 1 VRMS f = 100 kHz VS = 1 VRMS f = 100 kHz TA = 25 C Typ - 75 - 80 Max -40 to 85 C Min Max dB dB Unit
THD
Total harmonic distortion -3dB bandwidth Control pin input capacitance Sn port capacitance when switch is enabled Sn port capacitance when switch is disabled D port capacitance when switch is enabled
RL = 600 VS = 2 VPP 2.3 - 5.0 f = 20 Hz to 20 kHz 1.65 - 5.0 RL = 50
0.03
%
BW
150
MHz
CIN
6
CON
3.3
f = 1 MHz
52 pF
COFF
3.3
f = 1 MHz
25
CD
3.3
f = 1 MHz
50
1. OFF isolation = 20Log10 (VD/VS), VD = output. VS = input to OFF switch.
7/18
Test circuits
STG5123
4
Test circuits
Figure 3. ON resistance
I DS
V
V CC
S1
D
VS
S2
IN GND
GND
CS14071
Figure 4.
Bandwidth
V
CC
D S1 V OUT
S2
V
IN CC
GND
CS00371
8/18
STG5123 Figure 5. OFF leakage
Test circuits
V CC
I
S(OFF) D
I
D(OFF)
A
V SS
A
V D
S2
IN V CC
GND CS14081
Figure 6.
Channel-to-channel crosstalk
CS14091
9/18
Test circuits Figure 7. OFF isolation
V CC
STG5123
S1 50
V OUT
S2
IN GND VS GND
CS00381
Figure 8.
Test circuit
1. CL = 5/35 pF or equivalent: (includes jig capacitance) 2. RL = 50 or equivalent 3. RT = ZOUT of pulse generator (typically 50 )
10/18
STG5123 Figure 9. Break-before-make time delay
Test circuits
Figure 10. Switching time and charge injection (VGEN = 0 V, RGEN = 0 RL = 1 M CL = 100 pF) , ,
Figure 11. Turn on, turn off delay time
VCC
S1
D VOUT
RL S2
CL
IN
V IN
GND
CS08721
11/18
Package mechanical data
STG5123
5
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 12. DFN6L (1.2 x 1mm) package outline
7899067
1. Drawing not to scale.
12/18
STG5123 Table 8. DFN6L (1.2 x 1 mm) mechanical data
millimeters Symbol Typ A A1 A3 b D E e L L1 0.50 0.02 0.127 0.20 1.20 1 0.40 0.35 0.45 0.30 0.40 0.15 1.15 0.95 Min 0.45 0
Package mechanical data
Max 0.55 0.05
0.25 1.25 1.05
0.40 0.50
Figure 13. DFN6L (1.2 x 1 mm) foot print recommendation
13/18
Package mechanical data Figure 14. DFN6L carrier tape information
STG5123
7875978
1. Drawing not to scale. 2. Dimensions are in millimeters.
14/18
STG5123 Figure 15. DFN6L reel information drawing (back view)
Package mechanical data
1. Drawing not to scale. 2. Dimensions are in millimeters.
15/18
Package mechanical data Figure 16. DFN6L reel information drawing (front view)
STG5123
1. Drawing not to scale. 2. Dimensions are in millimeters.
16/18
STG5123
Revision history
6
Revision history
Table 9.
Date 30-Oct-2007
Document revision history
Revision 1 Initial release Changes
17/18
STG5123
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